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NCP590 Dual Output, High Accuracy, Ultra Low Dropout CMOS LDO
The NCP590 is a family of very high precision dual-output CMOS LDOs offered in a 2x2 DFN8 package. Each output is capable of delivering up to 300 mA and is available in voltages from 0.8 V to 5 V. The set point output voltage is accurate to within 0.9% with an operating voltage input up to 5.5 V. With its ultra low dropout characteristics and low quiescent and ground current consumption, the NCP590 is ideal for all battery operated consumer and microprocessor applications. The NCP590 is protected against short circuit and thermal overload conditions.
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DFN8, 2x2 MN SUFFIX CASE 506AA
* * * * * * * * * * * * * * * * * * * * * * * * * *
Dual Outputs, Each Supporting up to 300 mA Current Available in Output Combinations Ranging from 0.8 V to 5.0 V 2.1 V to 5.5 V VCC Operating Supply Range Ultra-High Accuracy (0.9% max at 100 mA load & 25C) Each Output has a Dedicated Enable Control Pin Enable Threshold Supports sub-1 V Systems Very Low Drop Out Voltage (50 mV typ @ 100 mA load) Low Noise (~20 mVrms) without Bypass Capacitor Ultra Low Shutdown Current (0.2 mA) Low Quiescent and Ground Current (80 - 100 mA typ.) Thermal Shutdown and Current Limit Protection Active Output Discharge when Disabled No Minimum Output Current Required for Stability Requires Cout of only 1.0 mF (any ESR) for Stability Stable with Any Type of Capacitor (including MLCC) and Zero Load Input Under Voltage Lock Out (UVLO) Internally Compensated Regulator for Quick Transient Response Space-Ef ficient 2x2 DFN8 Package This is a Pb-Free Device
MARKING DIAGRAM
XX M 1 4 XX = Specific Device Code M = Date Code
PIN CONNECTIONS
Vin EN1 EN2 NC 1 2 3 4 (Top View) 8 7 6 5 Vout1 Vout2 GND NC
Applications
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
Cellular Phones Cameras MP3/CD Players, PDA's, Camcorders DSP Supplies Portable Info-tronics PCMCIA Cards Networking Systems, DSL/Cable Modems
(c) Semiconductor Components Industries, LLC, 2007
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June, 2007 - Rev. 0
Publication Order Number: NCP590/D
NCP590
Vin Cin 1 mF NCP590 OFF OFF ON ON EN1 EN2 NC Vout2 GND NC Cout2 1 mF RLoad Vout2 Vin Vout1 Cout1 1 mF RLoad Vout1
Figure 1. Typical Application
PIN FUNCTION
Pin No. 1 2 3 4, 5 6 PAD 7 8 Symbol Vin EN1 EN2 NC GND GND Vout2 Vout1 Function Input; Bypass directly at the IC with a 1 mF ceramic capacitor to Ground Enable for output regulator 1; raise above 0.95 V to enable Vout1 Enable for output regulator 2; raise above 0.95 V to enable Vout2 NC; Do not make connection to these pins Ground The thermal pad should be connected to ground for best thermal performance. Float if necessary Output 2; Bypass to GND with a capacitor, 4.7 mF C 0.7 mF, any ESR Output 1; Bypass to GND with a capacitor, 4.7 mF C 0.7 mF, any ESR
Vin Error Amplifier + Current Limit Saturation Sense Thermal Protection
Vout1
EN1 EN2 Programmable Reference
Vout2 Error Amplifier + Current Limit Saturation Sense Thermal Protection GND
Figure 2. Block Diagram
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NCP590
ABSOLUTE MAXIMUM RATINGS TJ = -40C to 125C
Pin Symbol, Parameter VIN, Input to regulator Voltage Current VIN, Input peak Transient Voltage to regulator wrt GND VOUT1, VOUT2, Regulated Output Voltage Symbol VIN IIN VIN VOUT -0.3 Condition Min -0.3 Max 6.0 Internally Limited 7.0 VIN + 0.3 or 6.0 (Note 1) Internally Limited VIN + 0.3 or 6.0 (Note 1) 125 150 2 200 0.3 V V V Unit V
Current EN1, EN2, Enable Input
IOUT VEN
-0.3
Junction Temperature Storage Temperature ESD Capability, Human body model (Note 3) ESD Capability, Machine model (Note 3) Voutx-V in (Note 2)
TJ Tstg ESDHB ESDMM VRB
-50 -2 -200 -
_C kV V V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Which ever limit is lower 2. Exceeding this value will turn on the body diode of the PMOS driver (reference Figure 2).
THERMAL RESISTANCE
Parameter Junction-to-Ambient 2X2 DFN 1 oz Cu 2X2 DFN 2 oz Cu 2X2 DFN Symbol qJA Condition 207.0 sq mm 1 oz Cu 54.2 sq mm 1 oz Cu 20.2 sq mm 1 oz Cu 207.0 sq mm 2 oz Cu 54.2 sq mm 2 oz Cu 20.2 sq mm 2 oz Cu Value 158 210 375 133 184 330 36.4 60 -150 sec above 217 40 sec max at peak 265 pk 3 Unit _C/W
Junction-to-Ambient
qJA
_C/W
Junction-to-Board Lead Temperature Soldering, (Note 4) Reflow (SMD styles only), lead free Moisture Sensitivity Level
PsiJB Tsld MSL
_C/W _C
3. This device series incorporates ESD protection and is tested by the following methods: ESD HBM tested per AEC-Q100-002 (EIA/JESD22-A114) ESD MM tested per AEC-Q100-003 (EIA/JESD22-A115) 4. Per IPC/JEDEC J-STD-020C
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NCP590
ELECTRICAL CHARACTERISTICS -40C v TA v 85C (Note 5); VIN = VOUT +0.5 V or 2.1 V, whichever is greater (Note 6). VEN1,2 = 0.95 V, CIN = COUT1,2 = 1.0 mF, unless noted otherwise
Parameter Regulators Input Voltage VIN ** which ever limit is greater Vout(max) + 0.5 or 2.1 V** 0.0 -0.9 -1.9 -2.4 5.5 V Symbol Test Conditions Min Typ Max Unit
Enable Input Voltage Voltage Accuracy Voltage Accuracy Overall Voltage Accuracy
VEN VOUT VOUT VOUT
* which ever limit is lower IOUT = 100 mA, TA = 25C (Note 11) IOUT = 1 mA to 200 mA -40 _C v TA v 85_C (Notes 9, 11, 12) IOUT = 1 mA to 200 mA, VIN = (VOUT +0.5 V) to 5.5 V, 2.1 VINmin 0C v TA v 85C, (Notes 12, 13) IOUT = 1.0 mA VIN = (Vout + 0.5 V) to 5.5 V, VINmin = 2.1 V IOUT = 1 mA to 200 mA IOUT = 50 mA IOUT = 100 mA IOUT = 150 mA IOUT = 200 mA IOUT = 300 mA VEN1 = 0.95 V, IOUT1 = 0 mA; VEN2 = 0.4 V, IOUT2 = 0 mA OR VEN2 = 0.95 V, IOUT2 = 0 mA; VEN1 = 0.4 V, IOUT1 = 0 mA One Regulator ON; One Regulator OFF
-
VIN+ 0.3 or 5.5* +0.9 +1.9 +2.4
V % % %
Line Regulation (Note 7)
DVOUT
-
0.05
-
%/V
Load Regulation (Note 7) Drop-out Voltage, (Note 8) Drop-out Voltage, (Note 8) Drop-out Voltage, (Note 8) Drop-out Voltage, (Note 8) Drop-out Voltage, (Note 8) Quiescent Current; Iq = IIN - IOUT
DVOUT VDO VDO VDO VDO VDO Iq
-0.012 -
-0.005 23 52 80 110 165 80
0.012 40 85 125 170 225 125
%/mA mV mV mV mV mV mA
Quiescent Current; Iq = IIN - IOUT
Iq
IOUT1 = IOUT2 = 0 mA Both Regulators ON
-
115
195
mA
5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at TJ = TA = 25C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. VOUT based on the greater of the two outputs. 7. Overall accuracy specified over specified operating conditions of line, load, and temperature. 8. Drop out voltage VDO = VIN - VOUT measured when the output voltage has dropped 100 mV from the nominal value for VOUT > 2.0 V. 9. Guaranteed by design, not production tested. 10. Regulated and stable output over full load range down to 0 mA load. 11. VIN is set at VIN = ((VOUT + 0.5 V) + 5.5 V) / 2 or VIN = ((2.1 V) + 5.5 V) / 2, whichever is greater. 12. Applicable for VOUT u 1.2 V. 13. For all output voltages and -40C to 85C overall voltage accuracy is 2.9%. 14. Typical disable current is in the nA.
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NCP590
ELECTRICAL CHARACTERISTICS -40C v TA v 85C (Note 5); VIN = VOUT +0.5 V or 2.1 V, whichever is greater (Note 6). VEN1,2 = 0.95 V, CIN = COUT1,2 = 1.0 mF, unless noted otherwise
Parameter Regulators Ground Current; IGND = IIN - IOUT IGND VEN1 = 0.95 V, IOUT1 = 200 mA; VEN2 = 0.4 V, IOUT2 = 0 mA OR VEN2 = 0.95 V, IOUT2 = 200 mA; VEN1 = 0.4 V, IOUT1 = 0 mA One Regulator ON; One Regulator OFF IOUT1 = IOUT2 = 200 mA Both Regulators ON IOUT1,2 = 0 mA, VEN1,2 = 0.4 V Both Regulators OFF 105 150 mA Symbol Test Conditions Min Typ Max Unit
Ground Current; IGND = IIN - IOUT Disable Current; IDIS = IIN - IOUT ILoad Load Current (Note 10) Maximum Output Current Current Limit, per Regulator (Note 9) Output Noise Voltage (Note 9)
IGND IDIS IOUT IOUT ISC en
0 0 300
175 (Note 14) 750 20 30 155 15 1.9 0.1 60 55 50 40
250 1 2.1 -
mA mA mA mA mA mVRMS
VOUT = 0 V BW = 10 Hz to 100 kHz VOUT = 0.8 V VOUT = 2.8 V
-
Thermal Shutdown (Note 9)
TjSD UVLO UVLOhys PSRR
Junction Temperature Hysteresis
_C V V dB
Input under voltage lock out UVLO hysteresis Power Supply Rejection Ratio (Note 9)
IOUT = 200 mA 120 Hz 0.8 V output 120 Hz 1.8 V output 120 Hz 2.8 V output IOUT = 200 mA 1 KHz 2.8 V output
-
Power Supply Rejection Ratio (Note 9) Enable Control Characteristics Maximum Input Current at EN Input
PSRR
dB -
IEN
VEN = 0.0 V VEN = VIN
0.95
0.01 0.01 -
0.4 -
mA
Low Input Threshold High Input Threshold Timing Characteristics Turn On Time Delay, Both outputs turned on with ENABLE Turn Off Time Delay, Both outputs turned off with ENABLE (Note 9)
VIL VIH To 95% DVO VIN(MIN) to 5.5 V VIN = 5.5 V VOUT = 5 V, to VOUT = 250 mV VOUT = 0.8 V, to VOUT = 40 mV
V V
TON TOFF
-
375
700
ms
-
215 155
-
ms ms
Recommended Output Capacitor Specifications Output Capacitance (Note 9) COUT Capacitance over full temperature range of application. Any ESR 0.7 1.0 4.7 mF
5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at TJ = TA = 25C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. VOUT based on the greater of the two outputs. 7. Overall accuracy specified over specified operating conditions of line, load, and temperature. 8. Drop out voltage VDO = VIN - VOUT measured when the output voltage has dropped 100 mV from the nominal value for VOUT > 2.0 V. 9. Guaranteed by design, not production tested. 10. Regulated and stable output over full load range down to 0 mA load. 11. VIN is set at VIN = ((VOUT + 0.5 V) + 5.5 V) / 2 or VIN = ((2.1 V) + 5.5 V) / 2, whichever is greater. 12. Applicable for VOUT u 1.2 V. 13. For all output voltages and -40C to 85C overall voltage accuracy is 2.9%. 14. Typical disable current is in the nA.
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NCP590
Vin Cin 1 mF NCP590 OFF OFF IOUT2 ON ON EN1 EN2 NC Vout2 GND NC Cout2 1 mF IGND RLoad Vout2 Iin Vin Vout1 IOUT1 Cout1 1 mF RLoad Vout1
Figure 3. Measuring Circuit
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NCP590
TYPICAL PERFORMANCE CHARACTERISTICS
900 800 CURRENT LIMIT (mA) OUTPUT DROOP (%) 700 600 500 400 300 200 100 0 -40 -20 0 20 40 60 80 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 0 100 200 300 TEMPERATURE (C) LOAD CURRENT (mA) 0.8 Vout 2.8 Vout 1.5 Vout
5.0 V
3.3 Vout
Figure 4. Current Limit vs. Temperature
60 50 40 30 20 10 0 10 100 1,000 10,000 f, FREQUENCY (Hz) VOUT = 2.8 V 1.0 mA REJECTION (dB)
Figure 5. Typical Output Voltage Variation vs. Load Current
0 -10 -20 -30 -40 -50 -60 10 100 1000 10000 f, FREQUENCY (Hz)
RIPPLE REJECTION (dB)
200 mA
Figure 6. Power Supply Rejection Ratio
0.815 Vout, OUTPUT VOLTAGE (V) 0.810 1 mA 0.805 0.800 0.795 0.790 0.785 -40 100 mA 150 mA 200 mA -20 0 20 40 60 80 50 mA Vout, OUTPUT VOLTAGE (V) 5.05 5.04 5.03 5.02 5.01 5.00 4.99 4.98 4.97 4.96 4.95 -40
Figure 7. Cross Channel Rejection vs. Frequency
1 mA 100 mA 150 mA 200 mA 50 mA
-20
0
20
40
60
80
TEMPERATURE (C)
TEMPERATURE (C)
Figure 8. Output Voltage Change vs. Temperature for 0.8 Vout
Figure 9. Output Voltage Change vs. Temperature for 5.0 Vout
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NCP590
TYPICAL PERFORMANCE CHARACTERISTICS
NCP590 2.8 V Output, Line Transient Response, dVin = 0.5 V, Trise = Tfall = 30 msec.
2.83 Vout, OUTPUT VOLTAGE (V) 2.82 2.81 2.80 100 mA 2.79 150 mA 2.78 2.77 -40 200 mA 1 mA 50 mA
CH2 Vin 3.3 V to 3.8 V 1 V / div 30 ms rise 30 ms fall
-20
0
20
40
60
80
CH3 2.8 V Output, 1 mA Load 10 mV / div, 7 mV pk
TEMPERATURE (C)
Figure 10. Output Voltage Change vs. Temperature for 2.8 Vout
CH2 2.8 V Output1 200 mA step 50 mV / div CH3 2.8 V Output2 1 mA Load 10 mV / div
Figure 11. 2.8 Vout vs. Line Transient
CH3, 5.0 Vout 50 mV / div 200 mA step
CH2 3.3 Vout 10 mV / div 1 mA Load CH4 5.0 Vout 200 mA step
CH4 200 mA step on 2.8 V Output1, 200 mA / div
Figure 12. Load Transient on 2.8 Vout and Effect on 2.8 Vout for 200 mA Step
Figure 13. Load Transient on 5.0 Vout and Effect on 3.3 Vout for 200 mA Step
NCP590 Delay 5.5 Vin, EN1 = EN2 = Vin step, Vout1 = 3.3 V 1 mA, Vout2 = 5.0 V 200 mA
CH2, 0.8 V Output 200 mA step 50 mV / div CH3 1.5 V Output 1 mA Load 10 mV / div
CH4, Vout1 1 V / div D: 4.80 V D: 362 ms @: 4.76 V C4 rise 24.3 ms CH2 Vout2 2 V / div C2 Rise, 50.9 ms
CH4 200 mA step on 0.8 V Output
CH3 EN1, EN2, Vin 2 V / div
Figure 14. Load Transient on 0.8 Vout and Effect on 1.5 Vout for 200 mA Step
Figure 15. Typical Turn-on Delay for 3.3 Vout 1 mA, 5.0 Vout 200 mA Output with Simultaneous Vin and Enable
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NCP590
APPLICATION INFORMATION
Output Regulator
The output is controlled by a precision trimmed reference and error amplifier. The output has saturation control for regulation while the input voltage is low, preventing over saturation. Current limit and voltage monitors complement the regulator design to give safe operating signals to the processor and control circuits. Standard linear regulator design circuitry consists of only an active output driver providing current at the regulated voltage with resistors from the regulated output to ground (used in the feedback loop). This provides good turn- on characteristics from the active PFET output driver, but turn- off characteristics are determined by the output capacitor values and impedance of the load in parallel with the internal resistors in the feedback loop. The turn- off time in the situation with high impedance loads will be slow. The NCP590 has active pull- down transistors which turn on during device turn- off creating efficient fast turn- offs independent of loading.
Stability Considerations
where: VIN is the maximum input voltage, VOUT is the output voltage for each output, IOUT is the output current for each output in the application, and IGND is the quiescent or ground current the regulator consumes at IOUT. Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated:
RqJA + (125 oC * T A) PD
(eq. 1)
The input capacitor Cin in Figure 3 is necessary to provide low impedance to the input of the regulator. The output or compensation capacitor Coutx helps determine three main characteristics of a linear regulator: start- up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (- 25C to -40C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer's data sheet usually provides this information. Stability is guaranteed at values COUT = 0.7 mF to 4.7 mF and any ESR within the operating temperature range.
Calculating Power Dissipation in a Dual Output Linear Regulator
The value of RqJA can then be compared with those in the thermal resistance section of the data sheet. Those board areas with RqJA's less than the calculated value in equation 2 will keep the die temperature below 125C. In some cases, none of the circuit board areas will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required. The current flow and voltages are shown in the Measurement Circuit Diagram. A chart showing thermal resistance vs. pcb heat spreader area is shown below.
Enable
The maximum power dissipation for a dual output regulator (Figure x) is: PD = (VIN - VOUT1) x IOUT1 + (VIN - VOUT2 ) x IOUT2 + VIN x IGND (1)
Enabling the two outputs is controlled by two independent pins, EN1 and EN2. A high (above the high input threshold) on these logic level input pins causes the outputs to turn on. Normal operation allows for input voltages to these pins to 0.3 V above VIN. It is sometimes necessary to interface logic outputs from different operating voltages into these pins. This happens when standard operating system voltages must interface together (i.e., 5 V to 3.3 V systems). For example, a 5 V control voltage is needed to control the NCP590 operating with VIN = 3.6 V. The input current into the ENx pin can be kept to safe levels by adding a 100 k resistor in series with the 5 V control drive voltage. This will keep the input voltage in compliance with the maximum ratings and will allow control of the output. Use of this setup will affect turn- on time and will increase the enable current higher than the input current specified in the electrical parameter tables.
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NCP590
400 350 300 qJA (C/W) 250 200 150 100 50 0 0 50 100 150 200 250 300 350 400 450 500 550 COPPER HEAT SPREADING AREA (mm2) 600 650 1 oz 2 oz
Figure 16. Thermal Performance on PCB Heat Spreader
Thermal impedance of the NCP590 DFN8 mounted to a single sided copper plated circuit board.
ORDERING INFORMATION*
Device Orderable Part Number NCP590MNPPTAG NCP590MNDPTAG NCP590MNOATAG NCP590MN5DTAG NCP590MN5ATAG Marking Code PP DP OA 5D 5A Output Voltage VOUT1 2.8 1.8 1.5 1.2 1.2 VOUT2 2.8 2.8 2.4 1.8 1.5 Package DFN8 2x2 DFN8 2x2 DFN8 2x2 DFN8 2x2 DFN8 2x2 Shipping 10,000 / Tape & Reel 10,000 / Tape & Reel 10,000 / Tape & Reel 10,000 / Tape & Reel 10,000 / Tape & Reel
*Contact factory for additional voltage combinations.
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NCP590
PACKAGE DIMENSIONS
DFN8, 2x2 CASE 506AA-01 ISSUE D
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 --0.25 0.35
PIN ONE REFERENCE
E
2X
0.10 C
2X
0.10 C
TOP VIEW
DIM A A1 A3 b D D2 E E2 e K L
0.10 C
8X
0.08 C
SEATING PLANE
A1
e/2
1 8X 4
L
K
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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CCC CCC CCC CCC
8
A
SIDE VIEW D2
(A3) C
e
E2
5 8X
b
0.10 C A B 0.05 C NOTE 3
BOTTOM VIEW
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NCP590/D

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